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Neural Network Implementation Journal Papers
 | B. Linares-Barranco, E. Sánchez-Sinencio, A. Rodríguez-Vázquez and J. L. Huertas, ``A
Programmable Neural Oscillator Cell,'' IEEE Trans. Circuits and Systems (Special
Issue on Neural Networks), Vol. 36, pp. 756-761, May 1989. |
 | A. Rodríguez-Vázquez, B. Linares-Barranco, J. L. Huertas and E. Sánchez-Sinencio, ``On
the Design of Voltage Controlled Sinusoidal Oscillators Using OTA's,'' IEEE Trans.
on Circuits and Systems, Vol. 37, pp. 198-211, February, 1990. |
 | A. Rodríguez-Vázquez, R. Dominguez-Castro, A. Rueda, J. L. Huertas and E.
Sánchez-Sinencio, ``Nonlinear Switched-Capacitor `Neural' Networks for Optimization
Problems,'' IEEE Trans. on Circuits and Systems, Vol.
37, pp. 384-398, March, 1990. |
 | B. Linares-Barranco, A. Rodríguez-Vázquez, E. Sánchez-Sinencio and J. L. Huertas, ``CMOS
OTA-C High-Frequency Sinusoidal Oscillators,'' IEEE J. Solid-State Circuits,
Vol. 26, pp. 160-165, February 1991. |
 | B. Linares-Barranco, E.Sánchez-Sinencio, A. Rodríguez-Vázquez, and J. L. Huertas, ``A
CMOS Implementation of Fitzhugh-Nagumo Neuron Model'', IEEE J. Solid-State Circuits, Vol. 26, pp. 956-965, July
1991. |
 | B. Linares-Barranco, E. Sánchez-Sinencio, A. Rodríguez-Vázquez and J.L. Huertas, ``A
Modular T-Mode Design Approach for Analog Neural Network Hardware Implementations,'' IEEE
J. Solid-State Circuits, Vol. 27, No. 5, pp. 701-712, May 1992. |
 | M.E. Robinson, H. Yoneda and E. Sánchez-Sinencio, ``A Modular CMOS Design for a
Hamming Network,'' IEEE Trans. on Neural Networks, Special Issue, Vol. 3, No.
3, pp. 444-456, May 1992. |
 | R. Domínguez-Castro, A. Rodríguez-Vázquez, J.L. Huertas and E. Sánchez-Sinencio, ``Analog
Neural Programmable Optimizers in CMOS VLSI Technologies,'' IEEE J. Solid-State
Circuits, Vol. 27, No. 7, pp. 1110-1114, July 1992. |
 | B. Linares-Barranco, A. Rodríguez-Vázquez, E. Sánchez-Sinencio and J. Huertas, ``On
the Generation, Design and Tuning of OTA-C High-Frequency Sinusoidal Oscillators,'' IEE
Proceedings-G Electronic Circuits and Systems, Vol. 39, pp. 557-568, October 1992. |
 | Y. He, U. Cilingiroglu, and E. Sánchez-Sinencio, ``A High-Density and Low-Power
Charge-Based Hamming Network,'' IEEE Trans. on VLSI Systems, Vol. 1, No. 1, pp.
56-62, March 1993. |
 | J.E. Varrientos, E. Sánchez-Sinencio, and J. Ramírez-Angulo, ``A Current-Mode
Cellular Neural Networks Implementation,'' IEEE Trans. on
Circuits and Systems (Special Issue on Cellular Neural Networks), Vol. 40, CAS-II, pp.
147-155, March 1993. |
 | A. Rodríguez-Vázquez, S. Espejo, R. Domínguez-Castro, J.L. Huertas and E.
Sánchez-Sinencio, ``Current-Mode Techniques for the Implementation of Continuous and
Discrete-Time Cellular Neural Networks,'' IEEE Trans. on Circuits and Systems
(Special Issue on Cellular Neural Networks), Vol. 40, CASII, pp. 132-146, March 1993. |
 | B. Linares-Barranco, E. Sánchez-Sinencio, A. Rodríguez-Vázquez and J. L. Huertas, ``A
CMOS Analog Adaptive BAM with On-Chip Learning and Weight Refreshing,'' IEEE Trans.
on Neural Networks (Special Issue on Neural Network Hardware), Vol. 4, pp. 445-455,
May 1993. |
 | Y. He and E. Sánchez-Sinencio, ``A Min-Net Winner-Take-All CMOS Implementation,''
Electronics Letters, Vol. 29, No. 14, pp. 1237 -1239,
July 1993. |
 | S. Espejo, A. Rodríguez-Vázquez, R. Dominguez-Castro, J. L. Huertas, and E.
Sánchez-Sinencio, ``Smart Pixel Cellular Neural Networks in Analog Current-Mode CMOS
Technology,'' IEEE J. of Solid-State Circuits,
Vol. 26, No. 8, pp. 895-905, Aug. 1994. |
 | J. Chang, G. Han, J. M.
Valverde, N. C. Griswold, F. Duque-Carrillo, and E. Sánchez-Sinencio, "Cork Quality
Classification System Using a Unified Image Processing and Fuzzy-Neural Network
Methodology," IEEE Trans. on Neural Networks,
Vol. 8, No. 4, pp. 964-974, July 1997. |
 | L. Wang, J. Pineda de Gyvez,
E. Sánchez-Sinencio, Time Multiplexed Color Image Processing Based on a CNN with
Cell-State Outputs, IEEE Trans. on VLSI System, Vol. 6, pp. 314-322,
June 1998 |
 | G. Han and E.
Sánchez-Sinencio, A Flexible and
Expandable Neuroimage
Architecture, IEEE Trans on Circuits and
Systems-I, Vol. 46, No. 9, pp. 1055-1063, September 1999.
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